Fascinating new FPGA technology

Though I have to say that I'm a bit disappointed to see the editor for TechFocus Media, Kevin Morris, break embargo by one day with this breaking news, the two new FPGA technologies that he covers are anything but foolish:

http://www.techfocusmedia.net/fpgajournal/feature_articles/20100330-4d/

http://www.techfocusmedia.net/fpgajournal/feature_articles/20090401_retro/

Sequential versus Parallel

Here's another post on the same theme as the last (I'm sure it won't be my 'last'): the applicability of C/C++ for hardware design. Whether modeling, verifying or implementing, whenever one is considering synthesis, either as a path to emulation or to get to RTL, the question of the suitability of the language matters.

At CHREC (National Science Foundation (NSF) Center for High-Performance, Reconfigurable Computing), there is a report sponsored by DARPA funding entitled "A Research Agenda for Improving Configurable Computing Design Productivity". (I'm not sure if I'm linking to the executive overview or the final report) It looks like the date of this report is 2008. Here are a few interesting excerpts from section 4.2, Abstraction, on new languages:

"..many of these abstractions are based on inherently sequential languages. The sequential nature of these languages limits the ability to specify and to exploit the massive parallelism available in hardware circuits."

"While these recent tools and languages are a step in the right direction, we believe that they are insufficient for moving hardware design to a significantly new level of design productivity."

"We advocate the adoption of standard, concurrent programming languages for hardware design rather than adopting sequential programming languages and adding non-standard semantic extensions. The use of concurrent programming languages will facilitate the extraction of concurrency for hardware."

Must read for Hardware Designers/Managers Considering C/C++ Synthesis

A lot of good points were made in Jakob Engblom's blog back in July 2008 in a post entitled, What's the Obsession With C in EDA?. A couple highlights:

Taking a naturally parallel problem, packing it into disciplined sequential C, and then having a compiler discover the parallelism again is really a huge waste of effort.

and

But what I am uncertain about is whether the code provided by embedded developers, generated from domain-specific languages, or obtained as reference implementation is a actually a useful start for synthesis. In my experience, it would likely not be, as all that code is not designed to fit a restricted easy-to-manipulate subset of C.

To me it would look like you would have to at the very least go through the code and do a lot of rewriting and fixing to make it fit for synthesis. Negating most of the gain of reusing “existing” code.

Customer announcement today

Bluespec just announced Panasonic as a customer. It's been fun trying to understand the Tweets from Japan. I liked the (Yahoo Babel Fish) translation of the following excerpt from Hirano-san (The quote he's got here is from Fujikawa-san of Panasonic):

It is sharp, “as for Bluespec the fact that individual language is adopted is the point”

Dream ESL Language

I recently discovered Jakob Engblom's blog. I stumbled upon it after seeing a Tweet from Brad Pierce (who's fun to follow on Twitter, BTW) reference an interesting blog entry named Dream ESL Language. The best part was to see a nice Bluespec mention in one of Jakob's comments (thank you Jakob!):

Still, to be fair, there are some really cool things that have come out of the EDA field. Things like BlueSpec and “e” are pretty cool.

Chuck Thacker receives Turing Award

EETimes has an interview with Chuck Thacker, who just won ACM's Turing Award. It caught my eye as I've talked about transactional memory in previous posts, which Chuck mentions in this interview as one of the areas he's currently exploring in the parallel architecture space.

This made me think, as it came up recently, of an interview he did for the Computer Museum where, talking about Dave Conroy, Thacker says: "Dave is one of the few people I know that’s actually a better engineer than I am." I got a kick out of this quote when I first heard it -- but the funny thing is that someone I respect very much said that there truly are very few engineers better than Thacker.

IEEE SystemVerilog

Bluespec offers its fundamental enhancements to IEEE #SystemVerilog at Requirements Gathering mtg (slides: http://tinyurl.com/ye62mtp) #EDA