The system integration opportunity

There's an interesting guest blog by Jim Hogan, on EDN's website last week. He talks about the importance of IP, and, specifically, the opportunity for block level interconnect and memory control IP:

"In my opinion, there is a substantial untapped System-Level IP opportunities in block level interconnect and memory control–the architecture through which IP is integrated and IP interoperation is achieved.

"The new platform opportunity for what EDA becomes lies in the successful integration of third party blocks in a System on Chip (SOC) or an FPGA."

While this problem has been attacked with IP -- the approaches haven't been very flexible. In order to achieve a sophisticated level of parameterization, it's required tremendous development and maintenance of scripting and tool infrastructure. Interconnects need to be a lot more nimble in architecture/features and protocols and more sophisticated in design -- and need to be able to quickly support the needs of both modeling and implementation. I don't believe that RTL can easily or efficiently deliver on this.