There's a great, thought provoking editorial by EDN's Ron Wilson entitled: How languages influence design, and why we should care: a tale of C, Verilog and Trouble. It makes many of the same points that we (at Bluespec) often make -- in fact, our CTO, Rishiyur S. Nikhil, made a comment on Ron's blog.
In the piece, Ron makes an analogy with APL, which is a language for expressing certain types of math algorithms. Apparently, it's very difficult to write a good compiler for APL. He compares that to C, which may be nice for describing things, but it's just as difficult to do a good compiler for it for multi-cores or for hardware (outside of basic datapaths). In contrast, Verilog and VHDL are easy to write compilers for, but are too low level.
Unfortunately, the world of hardware is not simply datapaths -- even algorithms get complex and, many times, intermingle datapath and control. And, their implementations often need to be tightly coupled with switch interconnects, data moving units, and memory dynamics for optimal implementations.
And, what about system interconnects and other complex control related IP?
Automatic parallelization is neat technology, but it's not a general solution -- instead, we need solutions that are common to system interconnects, complex control and algorithmic IP so that we can elevate all projects in a design, especially the ones that are required to develop software.
Tuesday, January 13, 2009
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